Yield: the number that decides whether a fab makes money

A fab's revenue depends on how many working chips it ships. Its costs depend mostly on how many wafers it processes. The link between the two is yield, the share of chips that work. Small changes in yield make large differences in profit, which is why fabs watch it more closely than almost any other number.

Three kinds of yield

• Line yield. The share of wafers that make it through the whole process without being scrapped, for example due to a tool fault or handling damage.
• Die yield (sort yield). On a finished wafer, the share of individual chips, called dies, that pass electrical testing at wafer sort.
• Final test yield. The share of packaged chips that pass final test after assembly.

Overall yield is the product of the three. A fab with 98% line yield, 85% die yield and 97% final test yield delivers about 81% of the chips it started.

How many chips fit on a wafer

Before thinking about failures, it helps to know how many dies a wafer can hold. Square dies do not tile a round wafer perfectly, so some area at the edge is lost. A common estimate for gross dies per wafer is:

dies ≈ π × (d/2)² ÷ S − π × d ÷ √(2 × S)

where d is the wafer diameter and S is the die area. On a 300 mm wafer, a 100 mm² die gives about 640 gross dies. A very large AI chip of around 800 mm² gives only about 65.

Defects and the size penalty

Defects such as particles, pattern faults and film problems land on the wafer roughly at random. The more area a die covers, the more likely it is to catch one. A simple and widely used model for this is the Poisson yield model:

Y = e^{−D₀ × A}

where D₀ is the defect density (killer defects per cm²) and A is the die area in cm². With D₀ = 0.1 per cm², a 1 cm² die yields about 90%. An 8 cm² die yields about 45%. Large chips are expensive partly because they are large, and partly because far fewer of them survive.

Try it below. Move the sliders to change die size and defect density; the wafer map shows which dies pass and fail.

What yield does to cost

Take that illustrative $10,000 wafer with 640 gross dies:

Dropping from 90% to 60% raises the cost of every good chip by half, with the same equipment, people and materials. For a fab selling mature-node chips on thin margins, that can be the difference between profit and loss.

The yield ramp

A new process or a new fab never starts at mature yield. Early wafers have many defects and many sources of variation. Engineers find and remove them one by one: tuning recipes, fixing tools, tightening material specifications, changing designs where needed. Yield climbs along a learning curve, steeply at first and then more slowly. How fast a fab climbs that curve, its time to yield, has a large effect on the return on its investment.

How fabs find and fix yield problems

• Inspection. Optical and electron-beam systems scan wafers for particles and pattern defects after critical steps, and classify what they find.
• Metrology. Measuring film thickness, line widths and layer alignment catches processes drifting before they produce defects.
• Statistical process control. Every measured parameter is tracked against control limits, so drift triggers action early.
• Yield data analysis. Linking inspection, metrology, tool and test data shows which step, tool or material is behind a loss. Machine learning is increasingly used to classify defects and spot patterns across huge data sets.
• Infrastructure monitoring. Chemistry drift, gas purity and utility stability affect yield too, which is why subfab monitoring matters.

The principle behind all of these is simple: find a problem at the step where it starts, not at the end of the line two months later.

Why yield matters for India

India's new fabs and OSATs will be judged by how quickly they reach competitive yields. That depends on process control, on experienced people, and on reliable local supply of materials and services. Strong yield is the result of the whole ecosystem working well, which brings this series back to where it started.